Computer Science · Computer Organization and Architecture
While debugging, an engineer finds that data from memory is not reaching the CPU correctly even though the target address is transmitted properly. Which bus is most likely faulty?
- 1Interrupt Bus
- 2Address Bus
- 3Data Bus✓
- 4Control Bus
Correct answer
Data Bus
Download Single Question PDF
Save this question and verified answer as a clean study sheet with live clickable link.
Share with Friends & Study Groups
Challenge your peer aspirants on WhatsApp or Telegram to solve this question!
Preparing for Computer Science?
Practice full-length mock tests with real exam timers, instant score analysis, and all-India ranking.
Want more practice questions on Computer Organization and Architecture?
Solve complete topic-wise tests with detailed solutions on GkGet.
Related Practice Questions
Recommended practice questions in Computer Science · Computer Organization and Architecture