Physics · Digital Logic Families
Which of the following logic families consumes the least power under static conditions?
Verified Solution4 OptionsUpdated: October 2026👁️1 View
Share:
- 1ECL
- 2CMOS✓
- 3Low power Schottky TTL
- 4Low power TTL
Correct answer
CMOS
Download Single Question PDF
Save this question and verified answer as a clean study sheet with live clickable link.
👥
Share with Friends & Study Groups
Challenge your peer aspirants on WhatsApp or Telegram to solve this question!
Online Test Series
Preparing for Physics?
Practice full-length Physics mock tests with real exam timers, instant score analysis, and all-India ranking.
Chapter Practice
Practice Digital Logic Families MCQs →Want more practice questions on Digital Logic Families?
Solve complete topic-wise tests with detailed solutions on GkGet.
Related Practice Questions
Recommended practice questions in Physics · Digital Logic Families