Physics · Digital Electronics
When does a negative level-triggered flip-flop change its state?
- 1Only during the falling edge of the clock signal
- 2Only during the rising edge of the clock signal
- 3When the clock signal is at a high voltage level (logic 1)
- 4When the clock signal is at a low voltage level (logic 0)✓
Correct answer
When the clock signal is at a low voltage level (logic 0)
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