Computer · VLSI Design
What is the maximum voltage at the output node of a single NMOS pass transistor circuit when the gate voltage is VDD and the input node is also at VDD? Assume VDD = 1.8 V, the threshold voltage of the transistor VTN = 0.4 V, and the body bias effect is negligible.
Verified Solution4 OptionsUpdated: October 2026👁️1 View
Share:
- 10.8 V
- 21.0 V
- 31.4 V✓
- 41.8 V
Correct answer
1.4 V
Download Single Question PDF
Save this question and verified answer as a clean study sheet with live clickable link.
👥
Share with Friends & Study Groups
Challenge your peer aspirants on WhatsApp or Telegram to solve this question!
Online Test Series
Start Free Mock Test →Preparing for Computer?
Practice full-length mock tests with real exam timers, instant score analysis, and all-India ranking.
Chapter Practice
Practice VLSI Design MCQs →Want more practice questions on VLSI Design?
Solve complete topic-wise tests with detailed solutions on GkGet.
Related Practice Questions
Recommended practice questions in Computer · VLSI Design