Physics · Digital Electronics
In a JK Flip-Flop, if both inputs J and K are held at logic 0 and a clock pulse is applied, what will be the state of the output Q?
- 1The output toggles to the opposite state.
- 2The output is set to logic 1.
- 3The output is reset to logic 0.
- 4The output remains unchanged (No change state).✓
Correct answer
The output remains unchanged (No change state).
Download Single Question PDF
Save this question and verified answer as a clean study sheet with live clickable link.
Share with Friends & Study Groups
Challenge your peer aspirants on WhatsApp or Telegram to solve this question!
Preparing for Physics?
Practice full-length mock tests with real exam timers, instant score analysis, and all-India ranking.
Want more practice questions on Digital Electronics?
Solve complete topic-wise tests with detailed solutions on GkGet.
Related Practice Questions
Recommended practice questions in Physics · Digital Electronics