Mathematics · Electronic Devices
In a JFET self-bias configuration, the gate resistor is R G = 10 MΩ, and the input coupling network has resistors of 90 kΩ and 10 kΩ in parallel. The mid-frequency input impedance of the JFET amplifier is approximately:
- 110 kΩ
- 29 kΩ
- 318 kΩ✓
- 43 kΩ
Correct answer
18 kΩ
Download Single Question PDF
Save this question and verified answer as a clean study sheet with live clickable link.
Share with Friends & Study Groups
Challenge your peer aspirants on WhatsApp or Telegram to solve this question!
Preparing for Mathematics?
Practice full-length mock tests with real exam timers, instant score analysis, and all-India ranking.
Want more practice questions on Electronic Devices?
Solve complete topic-wise tests with detailed solutions on GkGet.
Related Practice Questions
Recommended practice questions in Mathematics · Electronic Devices