Computer Science · Computer Organization and Architecture
A byte-addressable computer system has a maximum addressable memory of 8 gigabytes. If its address bus width is 32 bits, what is the width of the data bus required to access 8 GB of memory space simultaneously if the architecture supports word-level addressing for that capacity?
- 116 bits✓
- 28 bits
- 364 bits
- 432 bits
Correct answer
16 bits
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