Physics · Digital Electronics
A 4-bit Serial-In Parallel-Out (SIPO) right shift register has an initial content of 1010. If the serial input is fed from the output of an exclusive-NOR (XNOR) gate whose inputs are the two least significant bits of the register, what will be the content of the register after 3 clock cycles?
- 11101
- 20111✓
- 31110
- 40101
Correct answer
0111
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